In this thesis, circuit parameters that are related to low power/energy high level synthesis for VLSI systems are studied. The identified parameters include switching activity, supply voltage, frequency and capacitance. Several high level synthesis algorithms are developed to optimize one or more of these parameters for low power/energy high level synthesis. In order to reduce the switching activity, a novel technique named Look-Ahead Synthesis (LAS) is proposed. This technique performs the switching activity reduction through and integrated process if scheduling and binding, employing the concept of look-ahead, backtracking and weighted bipartite matching. Special attention is given to register optimization in LAS, which adopts a register management technique to eliminate spurious switching and uses the bipartite matching to perform the register binding to reduce the switching activity on registers. The experimental results show that LAS is able to reduce the switching activity by 54.8% on average under resource constrained synthesis, although its effectiveness varies from design to design.