| ชื่อเรื่อง | : | A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures |
| นักวิจัย | : | Pete, D. J. , Helonde, J. B. , Vairagar, A. V. , Mhaisalkar, Subodh Gautam |
| คำค้น | : | DRNTU::Engineering::Materials::Electronic packaging materials. |
| หน่วยงาน | : | Nanyang Technological University, Singapore |
| ผู้ร่วมงาน | : | - |
| ปีพิมพ์ | : | 2555 |
| อ้างอิง | : | Pete, D. J., Helonde, J. B., Vairagar, A. V., & Mhaisalkar, S. G. (2012). A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures. Journal of electronic materials, 41(3), 568-572. , http://hdl.handle.net/10220/18150 , http://dx.doi.org/10.1007/s11664-011-1855-y |
| ที่มา | : | - |
| ความเชี่ยวชาญ | : | - |
| ความสัมพันธ์ | : | Journal of electronic materials |
| ขอบเขตของเนื้อหา | : | - |
| บทคัดย่อ/คำอธิบาย | : | Electromigration-induced void evolution in various dual-inlaid copper (Cu) interconnect structures was simulated by applying a phenomenological model assisted by Monte Carlo-based simulations, considering the redistribution of heterogeneously nucleated voids and/or pre-existing vacancy clusters at the Cu/dielectric cap interface during electromigration. The results indicate that this model can qualitatively explain the electromigration-induced void evolution observed during experimental in situ secondary-electron microscopy (SEM) investigations as well as in various other reported studies. The electromigration mechanism in Cu interconnect structures and differences in the peculiar electromigration-induced void evolution in various dual-inlaid Cu interconnect structures can be clearly understood based on this model. These findings warrant reinvestigation of technologically important electromigration mechanisms by developing rigorous models based on similar concepts. |
| บรรณานุกรม | : |
Pete, D. J. , Helonde, J. B. , Vairagar, A. V. , Mhaisalkar, Subodh Gautam . (2555). A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures.
กรุงเทพมหานคร : Nanyang Technological University, Singapore. Pete, D. J. , Helonde, J. B. , Vairagar, A. V. , Mhaisalkar, Subodh Gautam . 2555. "A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures".
กรุงเทพมหานคร : Nanyang Technological University, Singapore. Pete, D. J. , Helonde, J. B. , Vairagar, A. V. , Mhaisalkar, Subodh Gautam . "A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures."
กรุงเทพมหานคร : Nanyang Technological University, Singapore, 2555. Print. Pete, D. J. , Helonde, J. B. , Vairagar, A. V. , Mhaisalkar, Subodh Gautam . A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures. กรุงเทพมหานคร : Nanyang Technological University, Singapore; 2555.
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