This thesis describes the proposal, analysis, and realization of novel modulation schemes for digital modulators of Class D amplifiers and of switched-mode dc-dc converters. The applications of the amplifiers and converters are respectively power-critical and hardware (IC area)-critical audio devices (such as advanced digital hearing instruments) and general-purpose low-noise power supplies with easily realizable hardware. The modulation schemes for the digital modulators of the Class D amplifiers are the reported simplified Linear Interpolation (sLI) Pulse Width Modulation (PWM) (equivalent to 1st-order Lagrange Interpolation) scheme and a proposed Combined 1st- and 2nd-order Lagrange Interpolation (LAGI) PWM scheme. A double Fourier expression for the output of the sLI PWM is derived, depicting the non-linearities and the mechanisms thereof. On the basis of simulations using a 0.35 micrometre CMOS process, the sLI PWM features micropower operation (6.7 microWatts at 1.1 V supply). On the basis of measurements, a Class D amplifier, whose digital modulator (realized in an FPGA) embodies the sLI PWM, features low non-linearities (THD+Noise = -67 dB over 4 kHz bandwidth). The proposed LAGI PWM requires computational complexity slightly over twice that of the sLI PWM scheme (the computational complexity nevertheless remains very modest) but with significantly reduced (11 dB THD improvement) non-linearities. A double Fourier series expression is derived for the output of the proposed LAGI PWM, depicting the non-linearities and the mechanisms thereof. A frequency doubler (for the PWM pulse generator of the digital modulator) that halves the clock rate with very low hardware overheads, leading to a substantial ~50 % power dissipation reduction of the pulse generator, is also proposed. A proposed digital modulator, embodying the proposed LAGI PWM (and the reported multi-bit Delta-Sigma Modulation scheme), is realized in a prototype IC using a 0.35 micrometre digital CMOS process. Measurements on the digital modulator show very modest average power dissipation (31 microWatts at 1.1 V; the LAGI PWM dissipates 17 microWatts (based on simulations)) and features a very low THD+Noise (-74 dB measured over 8 kHz bandwidth). A new Figure-of-Merit to meaningfully benchmark digital modulators of varying parameters is also proposed. On the basis of this Figure-of-Merit, the LAGI PWM digital modulator exhibits very competitive performance against reported digital modulators. A novel Randomized Wrapped-Around Pulse Position Modulation scheme (RWAPPM) for the digital modulators of the switched-mode dc-dc converters is proposed. Unlike reported randomized modulation schemes that require a randomized switching period (thereby resulting in the complete elimination of discrete harmonics), the RWAPPM requires only a constant switching period (thereby advantageous in terms of easy realization in hardware) and yet its discrete harmonics are negligible. An expression for the output of the RWAPPM is derived, depicting the non-linearities and the mechanisms thereof. When the RWAPPM is benchmarked against the non-randomized PWM and reported randomized modulation schemes for a dc-dc buck converter, it features negligible discrete harmonics (<=-169 dBFS) and the lowest peak spectral power (-49.6 dBFS, before low-pass filtering). Further, when benchmarked against the randomized modulation schemes, it features the (equal) lowest ripple noise (2 mVrms, after low-pass filtering). All derived analytical expressions herein are verified by computer simulations and on the basis of physical measurements.