Basic mechanisms governing the generation and injection of hot electrons in the N-channel MOSFET are of fundamental importance to non-volatile memory application and reliability. In this thesis, we have reported direct observation of a non-classical hot-electron gate current in the scaled MOSFET memory cell, under the conventional CHE biasing regime (i.e. Vgs ~ Vds) at reduced voltage condition. Through a systematic experimental study, it has been shown clearly that this non-classical tertiary-electron injection current is induced by a sub-surface lateral impact-ionization feedback mechanism, which is particularly prominent in devices with a steep vertical channel profile. The inherent non-local nature of this tertiary-electron injection will lead to a substantial spread of hot-electron induced oxide and interface damage into the channel region even at a reduced Vds. This will set a stringent limit for memory cell scaling due to the suppressed scalability of the oxide damage region. Last but not least, lifetime projection from accelerated stress condition (where conventional CHE effect dominates) may grossly overestimate the parametric lifetime concerned if one neglects the dominance of non-classical tertiary-electron injection at low field regime.