A novel ultra-low power two terminal zener voltage reference is designed and implemented. It realizes the concept of using sub-threshold region of the MOSFET to achieve a very low and stable output voltage within a two terminal circuit topology. This proposed voltage reference was fabricated with Global Foundries 0.18-μm CMOS process, consuming only a very small die area of 0.0009 mm2. Experimental results, carried out on five different silicon samples, explicitly show that it can yield a stable output voltage of 0.22 V at room temperature. It achieves an average temperature coefficient of 6.4 ppm/°C across a wide temperature range from 0°C to 150°C with a standard deviation of 2 ppm/°C. Furthermore, it achieves an ultra-low power consumption of 2 μW. The load regulation is 20 mV/V. This simple and innovative two terminal device can be used to provide a very low and constant voltage difference between any two nodes in an analog circuit.