| ชื่อเรื่อง | : | Design and optimization of the extended true single-phase clock-based prescaler |
| นักวิจัย | : | Yu, Xiao Peng , Do, Manh Anh , Lim, Wei Meng , Yeo, Kiat Seng , Ma, Jianguo |
| คำค้น | : | DRNTU::Engineering::Electrical and electronic engineering. |
| หน่วยงาน | : | Nanyang Technological University, Singapore |
| ผู้ร่วมงาน | : | - |
| ปีพิมพ์ | : | 2549 |
| อ้างอิง | : | Yu, X. P., Do, M. A., Lim, W. M., Yeo, K. S., & Ma, J. (2006). Design and optimization of the extended true single-phase clock-based prescaler. IEEE Transactions on Microwave Theory and Techniques, 54(11), 3828-3835. , 0018-9480 , http://hdl.handle.net/10220/5950 , http://dx.doi.org/10.1109/TMTT.2006.884629 |
| ที่มา | : | - |
| ความเชี่ยวชาญ | : | - |
| ความสัมพันธ์ | : | IEEE transactions on microwave theory and techniques |
| ขอบเขตของเนื้อหา | : | - |
| บทคัดย่อ/คำอธิบาย | : | The power consumption and operating frequency of the extended true single-phase clock (E-TSPC)-based frequency divider is investigated. The short-circuit power and the switching power in the E-TSPC-based divider are calculated and simulated. A low-power divide-by-2/3 unit of a prescaler is proposed and implemented using a CMOS technology. Compared with the existing design, a 25% reduction of power consumption is achieved. A divide-by-8/9 dual-modulus prescaler implemented with this divide-by-2/3 unit using a 0.18-µm CMOS process is capable of operating up to 4 GHz with a low-power consumption. The prescaler is implemented in low-power high-resolution frequency dividers for wireless local area network applications. |
| บรรณานุกรม | : |
Yu, Xiao Peng , Do, Manh Anh , Lim, Wei Meng , Yeo, Kiat Seng , Ma, Jianguo . (2549). Design and optimization of the extended true single-phase clock-based prescaler.
กรุงเทพมหานคร : Nanyang Technological University, Singapore. Yu, Xiao Peng , Do, Manh Anh , Lim, Wei Meng , Yeo, Kiat Seng , Ma, Jianguo . 2549. "Design and optimization of the extended true single-phase clock-based prescaler".
กรุงเทพมหานคร : Nanyang Technological University, Singapore. Yu, Xiao Peng , Do, Manh Anh , Lim, Wei Meng , Yeo, Kiat Seng , Ma, Jianguo . "Design and optimization of the extended true single-phase clock-based prescaler."
กรุงเทพมหานคร : Nanyang Technological University, Singapore, 2549. Print. Yu, Xiao Peng , Do, Manh Anh , Lim, Wei Meng , Yeo, Kiat Seng , Ma, Jianguo . Design and optimization of the extended true single-phase clock-based prescaler. กรุงเทพมหานคร : Nanyang Technological University, Singapore; 2549.
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